1. Field of the Invention
This invention relates in general to the field of computing and, more particularly, to a means of increasing data flow in an out-of-order processing system. Specifically, the invention relates to the renaming of segment registers to enhance out-of-order processing.
2. Description of the Related Art
Register renaming is known to those of ordinary skill in the art. To implement register renaming, a processor typically redirects an instruction to store information at a newly allocated register, rather than the original register identified in the instruction. A subsequent instruction that attempts to read the original register is similarly redirected to the newly allocated register. Thus, the hardware renames each original register identifier in each instruction to identify a new register, such that the same original register identifier in several different instructions may access different physical registers.
Since storage conflicts introduce constraints that may not be necessary to produce correct results, register renaming can be particularly helpful when processing instructions out-of-order. FIG. 1 illustrates the value of register renaming in an out-of-order processing system. An application program consists of M separate instructions, which in an in-order processing system could be executed in the sequential order shown without error. However, because of a storage conflict regarding a register X used in the application program, executing the program illustrated in FIG. 1 in an out-of-order processing system may introduce undesirable errors. The first instruction 105 writes data to a register X 110 from a set of N registers. Likewise, the third instruction 115 also writes data to the register X 110. The second instruction (not shown) adds the contents of register X 110 with the contents of a register Z 120. Due to storage conflicts (i.e., instructions one and three require the same register), the third instruction 105 should not be executed until the first two instructions have been performed. Register renaming allows the first instruction 105 to write to the register X 110 and redirects the third instruction 115 to write to a register Y 125, thus allowing the third instruction to be executed before the second instruction if desired. Instructions after the third instruction referencing the register X of instruction three would likewise be redirected to register Y. Out-of-order processing made possible by register renaming enables the removal of storage conflicts by allocating some registers as temporary storage registers.
Segmentation, as used in some computer architectures (e.g., Intel Architecture), is also a technique well known to those of ordinary skill in the art. Information inside a microprocessor is tracked using a logical address rather than a physical address. The memory management unit takes each logical address and translates it into a physical address that corresponds to a particular hardware location in main memory. To effectively do this, the memory management unit employs segmentation, which is a technique that provides each program with a unique address space in main memory known as a segment. Logical addresses are used to keep track of processed information; they are composed of a segment selector and an offset. The segment selector is an index used to locate the appropriate segment descriptor from a descriptor table in main memory. Segment descriptors contain information about the requested segment such as base address, size, and access rights. Once a logical address is sent to the memory management unit, the segment selector is compared with a segment register in the segmentation circuitry. The segment register contains the base address and size for the current segment descriptors so that a logical to physical address translation can be performed.
Instructions accessing segment registers have the same forced conflict limitations as instructions accessing other registers. If two instructions access the same segment register, the second and subsequent instructions cannot be processed until the instructions following the first access to the segment register have retired. Previous microprocessors have renamed segment registers to remove these forced conflicts and enhance out-of-order processing. Segment registers are typically stored in separate register stacks, resulting in the need for separate renaming and alias tracking hardware. This duplicative hardware results in higher circuit complexity and increased microprocessor cost.